Actel's 2nd Generation Reprogrammable Flash FPGAs
ProASICPLUS devices with FlashLock® expand
on all the features and benefits offered by the ProASIC family. Based on
Actel flash technology, ProASICPLUS devices offer the unique
combination of reprogrammability and nonvolatility in a high density programmable
logic product. ProASICPLUS devices combine the advantages
of ASICs with the benefits of FPGAs, enabling engineers to leverage their
existing ASIC or FPGA design flows and tools.
Key Features
- Maximum design security
- Reprogrammable
- Nonvolatile
- Live at power-up
- ASIC design flow
- Very low power
- PLLs and LVPECL I/O
- Available in military and automotive temperature grades
| Device |
APA075 |
APA150 |
APA3001 |
APA450 |
APA6001 |
APA750 |
APA10001 |
|
Maximum System Gates
|
75,000
|
150,000
|
300,000
|
450,000
|
600,000
|
750,000
|
1,000,000
|
|
Tiles (Registers)
|
3,072
|
6,144
|
8,192
|
12,288
|
21,504
|
32,768
|
56,320
|
Embedded RAM kbits
(1,024 bits)
|
27
|
36
|
72
|
108
|
126
|
144
|
198
|
Embedded RAM Blocks
(256x9)
|
12
|
16
|
32
|
48
|
56
|
64
|
88
|
|
LVPECL
|
2
|
2
|
2
|
2
|
2
|
2
|
2
|
|
PLL
|
2
|
2
|
2
|
2
|
2
|
2
|
2
|
|
Global Networks
|
4
|
4
|
4
|
4
|
4
|
4
|
4
|
|
Maximum Clocks
|
24
|
32
|
32
|
48
|
56
|
64
|
88
|
|
Maximum User I/Os
|
158
|
242
|
290
|
344
|
454
|
562
|
712
|
|
JTAG ISP
|
Yes
|
Yes
|
Yes
|
Yes
|
Yes
|
Yes
|
Yes
|
|
PCI
|
Yes
|
Yes
|
Yes
|
Yes
|
Yes
|
Yes
|
Yes
|
|
Speed Grades
|
Std.
|
Std.
|
Std.
|
Std.
|
Std.
|
Std.
|
Std.
|
|
Temperature Grades
|
C, I, A
|
C, I, A
|
C,I,A,M,B
|
C, I, A
|
C,I,A,M,B
|
C, I, A
|
C,I,A,M,B
|
|
Package (by
pin count)
|
|
TQFP
|
100, 144
|
100
|
|
|
|
|
|
|
PQFP
|
208
|
208
|
208
|
208
|
208
|
208
|
208
|
|
PBGA
|
|
456
|
456
|
456
|
456
|
456
|
456
|
|
FBGA
|
144
|
144, 256
|
144, 256
|
144, 256, 484
|
256, 484, 676
|
676, 896
|
896, 1152
|
|
CQFP2
|
|
|
208, 352
|
|
208, 352
|
|
208, 352
|
|
CCGA/LGA2
|
|
|
|
|
624
|
|
624
|
- Notes:
-
- Available as Commercial/Industrial and Military/MIL-STD-883B devices.
- These packages are available only for Military/MIL-STD-883B devices.
The
ProASICPLUS family of FPGAs is fully supported by both
the Actel Libero IDE and
the Actel Designer FPGA
Development software. Actel's Designer software provides a comprehensive
suite of backend development tools for FPGA development, which includes
timing-driven place-and-route, a world-class integrated static timing analyzer
and constraints editor, a design netlist schematic viewer, and SmartPower,
a tool that allows the user to quickly estimate the power consumption in
a design.
The low cost
ProASICPLUS Starter
Kit contains everything you need to start using the advanced features
of the Actel ProASIC
PLUS family. The kit includes the
following:
- Evaluation board with an APA300 ProASICPLUS device
- Actel Libero IDE
Gold
- FlashPro
Lite rev C programmer and cable
- Power supply
- User's guide including PCB schematics
- Sample design
Other ProASICPLUS Development Kits & Boards
ProASICPLUS devices offer in-system programming capabilities.
To program a device, the configuration data is supplied through a standard
JTAG interface either from a microprocessor, Silicon
Sculptor 3, Silicon
Sculptor II, FlashPro
Lite, or FlashPro.
For applications without a microprocessor, Silicon Sculptor II is best
for production volumes while the FlashPro programmers, with their small
size and ease of portability, are ideal for prototyping.
For ProASICPLUS trace and debugging, Synopsys® provides logic analysis software Identify Actel Edition (AE).
Search for
ProASICPLUS IP Cores.
| Technology Solutions |
|
Flash-based FPGAs store the configuration information in on-chip
flash cells and require no additional configuration nonvolatile memory
in order to load the device configuration data at every system power-up,
which reduces cost and increases security and system reliability.
|
|
ProASICPLUS is an ideal choice for battery-operated
and other power-sensitive applications. With ProASICPLUS there
is no power-on current surge and no high current transition, which
exists on SRAM FPGAs. ProASICPLUS also has significantly
lower dynamic power consumption than SRAM FPGAs to further maximize
power savings. » More
|
|
Greatly simplifies system design, making the device available to
perform critical system setup tasks and reduce bill-of-materials costs
and PCB area. » More
|
|
The nonvolatile, flash-based ProASICPLUS family
requires no boot PROM, so there is no vulnerable external bitstream
that can be easily copied. ProASICPLUS devices incorporate
FlashLock, which provides a unique combination of reprogrammability
and design security. » More
|
|
Firm errors do not exist in ProASICPLUS FPGAs.
The configuration element of ProASICPLUS FPGAs, the
flash cell, cannot be altered once programmed and is therefore immune
to particle effects. » More
|
Third-Party Support
|
Synthesis Simulation |
Static |
Timing |
|
Cadence
|
BuildGates
|
NC-VHDL
NC-Verilog
NC-Sim
Verilog-XL
|
-
|
|
Mentor
Graphics
|
Precision
Leonardo Spectrum
|
ModelSim
|
-
|
|
Synopsys
|
Design Compiler
FPGA Compiler II
FPGA Express
|
Scirocco
VCS
VSS
|
PrimeTime
|
|
Synplify
|
-
|
-
|
