SmartFusion Design Flow

The SmartFusion design flow addresses and satisfies the needs of both the FPGA hardware design engineer and the embedded software development engineer by providing independent and parallel design flows for each.

For the FPGA hardware designer, Libero Integrated Design Environment (IDE) supports the powerful block-system-based SmartDesign methodology. Microcontroller subsystem (MSS) and other design component blocks are configured and connected together to complete a full SmartFusion FPGA design. The MSS from the hardware development side is used to configure I/Os, clocks, and logic extension onto the SmartFusion fabric. From that point the traditional design flow through synthesis, simulation, and layout is used.

The embedded software designer can configure MSS peripherals independent of the Libero IDE FPGA hardware development system using Actel's SoftConsole Eclipse-based software IDE to instantiate drivers, test sample projects, or create and debug the final application software. Based on the MSS peripherals used, the memory map automatically generates all the required firmware for the selected configurations. From this point forward, the embedded designer can work within the standard processor design flow in a software tool of choice, such as Actel's SoftConsole, Keil Microcontroller Design Kit (MDK) or IAR Embedded Workbench. The MSS configurator can be launched from any one of these industry-standard software IDEs.

When design development is complete, Actel's FlashPro4 programmer can be used to implement the hardware design into the FPGA. FlashPro4, IAR Systems' J-LINK™, or Keil's ULINK programmers can be used to program and debug the embedded software design.

The MSS configurator is a separate software application from Actel and is available only for SmartFusion devices.