RTAX-S/SL

Download the application notes below to find out how to use Actel RTAX-S/SL FPGA devices in a specific application or process.

	AC288: Using LVDS for Actel's Axcelerator and RTAX-S/SL Devices App Note		2 MB	5/2012	Click on the to rate this document
	AC274: CQFP to FBGA Adapter Sockets App Note  Pin Mapping List for RTAX1000S (or AX1000) CQ352 to AX1000 FG896 Adapter (XLS, 985 KB) Pin Mapping List for RTAX2000S (or AX2000) CQ352 to FG896 Adapter (XLS, 499 KB) Pin Mapping List for RTAX2000S (or AX2000) CQ256 to FG896 Adapter (XLS, 214 KB) Pin Mapping List for RTAX250S (or AX250) CQ352 to AX250 FG484 Adapter (XLS, 177 KB)		7 MB	11/2011	Click on the to rate this document
	AC373: Source-Synchronous Clock Designs: Timing Constraints and Analysis App Note   Design Files (ZIP, 5.1 MB, 11/11)		2 MB	11/2011	Click on the to rate this document
	AC379: Advanced Static Timing Analysis Using SmartTime App Note		6 MB	11/2011	Click on the to rate this document
	AC275: Actel CCGA to FBGA Adapter Socket Instructions App Note  Pin Mapping List for RTAX1000S (or AX1000) CG624 to AX1000 FG896 Adapter (XLS, 868 KB) Pin Mapping List for RTAX2000S (or AX2000) CG624 to AX2000 FG896 Adapter (XLS, 292 KB)		2 MB	11/2011	Click on the to rate this document
	AC354: Core8051s Debugging in Axcelerator and RTAX-S Device  Design Files (ZIP, 25.7 MB, 9/10)		1 MB	10/2011	Click on the to rate this document
	AC378: RTAX-S/SL/DSP Programming Guide App Note		57 KB	9/2011	Click on the to rate this document
	AC341: Actel CCGA to CLGA Adapter Socket Application Note		946 KB	8/2010	Click on the to rate this document
	AC344: Board-Level Considerations for Power-Up and Power-Down of RTAX-S/SL FPGAs		930 KB	5/2010	Click on the to rate this document
	AC342: Actel CQFP to CLGA Adapter Socket Application Note		588 KB	3/2010	Click on the to rate this document
	AC310: RTAX-S/SL Clocking Resource and Implementation App Note		722 KB	5/2009	Click on the to rate this document
	AC319: Using EDAC RAM for RadTolerant RTAX-S/SL FPGAs and Axcelerator FPGAs App Note – Applies to EDAC Core from Libero IDE v7.2 and Newer EDAC Core from Libero IDE v7.2 (ZIP, 45 KB, 06/06)		691 KB	2/2008	Click on the to rate this document
	AC305: Implementation of the SpaceWire Clock Recovery Logic in Actel RTAX-S Devices App Note  Design File (ZIP, 86 KB, 08/07) Timing Analysis (XLS, 73 KB, 08/07)		352 KB	8/2007	Click on the to rate this document
	AC304: Simulating SEU Events in EDAC RAM App Note  Design File (ZIP, 582 KB, 08/07)		1 MB	8/2007	Click on the to rate this document
	AC273: Using EDAC RAM for RadTolerant RTAX-S FPGAs and Axcelerator FPGAs App Note – Applies to EDAC Core from Libero IDE v7.1 and Older EDAC Core from Libero IDE v7.1 or Earlier (ZIP, 41KB, 07/04)		256 KB	7/2006	Click on the to rate this document
	AC173: Differences Between RTAX-S/SL and Axcelerator App Note		62 KB	5/2003	Click on the to rate this document
	AC170: Prototyping RTAX-S Using Axcelerator Devices App Note		131 KB	4/2003	Click on the to rate this document

Packaging

	AC190: Ceramic Column Grid Array Package App Note		1 MB	8/2008	Click on the to rate this document
	AC193: Ceramic Chip Carrier Land Grid (CC256) Package Handling App Note		207 KB	11/2003	Click on the to rate this document

Other

	AC139: Using Synplify to Design in Microsemi Radiation-Hardened FPGAs App Note		519 KB	5/2012	Click on the to rate this document
	Antifuse Programming FAQ		568 KB	3/2010	Click on the to rate this document
	AC263: Simultaneous Switching Noise and Signal Integrity App Note		98 KB	6/2006	Click on the to rate this document
	AC134: Minimizing Single Event Upset Effects Using Synopsys App Note		47 KB	9/1998	Click on the to rate this document
	AC128: Design Techniques for RadHard FPGAs App Note		62 KB	9/1997	Click on the to rate this document